Canonic look ahead: critical cycle relaxed IIR filtering with minimum multiplicative complexity

In this paper we present an architecture to relax the critical cycle associated with the feedback operations in IIR filtering when high sampling frequencies exceed the computation bandwidth of digital arithmetics. Its complexity, evaluated in terms of multiplications per output sample per pole, equals that of the canonic IIR recursion and provides considerable savings in comparison to existing techniques such as Clustered and Scattered Look Ahead. The procedure is shown to yield unconditionally stable implementations. 1. I N T R O D U C T I O N The computation of very high speed digital FIR filters is accomplished via parallelization and pipelining of operations. Nevertheless, the feedback inherent in IIR filters makes its computation not so straightforward a task. The latency associated with arithmetic operations, and in particular, with the feedback path, limits the maximum sampling frequency of the input signal. Architectures other than the conventional tapdelay filtering have been extensively sought, of which Clustered (CLA) [l], Scattered Look Ahead (SLA) [2] ,[4] and Minimum Denominator Multiplying (MDM) [3] constitute the best known. [5] and [6] are also references of interest. The philosophy is to modify the numerator and denominator of the filter H,-I = N,-I/D=-I so that the same response H,-1 = Ni.-l/DL-l is preserved but the computation of l/Di-l can be tackled at the operation rate. By way of an example, SLA would perform the following transformation on a single real pole filter, with m = 2' and M,-1 = rI:LJ(l + p 2 i ~ 2 t ) , so that the zeroes of the polynomial M,-I would cancel out the additional (stable) poles introduced in the denominator. The computation of the filter output at the sampling frequency can now be guaranteed as the computation of the feedback 0 This work was supported by TIC98-0412, TIC98-0703, TIC99-0849 (CICYT) and CIlUT/Generalitat de Catalunya 1998SGR-00081. 0-7803-704 1 -VOll$lO.OO 02001 IEEE can take place at the operation frequency. The computation of the denominator filter can always be efficiently parallelized as no feedback occurs. The suite of techniques proposed in the literature to include additional poles while maintaining filter stability do always incur in additional complexity. The multiplicative complexity of these architectures, Cx, defined as multiplies per sample per pole, always increases with respect to the complexity of the conventional IIR filter architecture. SLA provides an increase of T = log, m times in multiplicative complexity. provides considerable savings in Cx with respect to previously known critical cycle relaxing architectures, so that the final complexity in the implementation of any IIR filter equals that of the canonic IIR recursion. C , is bounded in all cases by, The technique we propose, Canonic Look Ahead (CaLA), where Cg2f1 would be reached by a IIR filter with an infinite number of poles and C,,,,, constitutes the multiplicative complexity of a single pole filter. Let P denote the number of poles. Then, CE>yi < CE"p"A1 monotonically. Thus, CaLA approaches the complexity of the conventional IIR architecture asymptotically. This is done at the expense of the additive complexity C+, which increases by a factor of 2 ~ 7 l with respect to the conventional architecture, irrespectively of the number of poles P. We will describe CaLA in terms of first and second order stages to implement real pole factors and conjugate pair pole factors in the denominator D,-1. The minimum multiplicative complexity is achieved by CaLA through exploitation of the common operations in computing the filter M z l . Therefore, CaLA is essentially a block processing or polyphase scheme. The parallelization of the direct nuruerator filter N,-1 constitutes a different problem and is not considered in the scope of this paper. Also, complexity is only analyzed in terms of number of operations (multiplications and additions). More detailed analyses should consider bit-level implementation for a given application: the dynamic range and bit width of signals. [CaLA] 2. CANONIC: LOOK AHEAD We will consider the critical cycle relaxed implementation of first and second order stages of the objective IIR fil-